Field of the Invention
The invention relates in general to a solid state drive (SSD), and more particularly to a writing method for processing data transfer inside the SSD when writing data to the SSD.
Description of the Related Art
Solid state drive (SSD) integrates NAND flash memory array into one single storage device. Due to the feature of storing data voltage by utilizing the voltage conversion of semiconductor, the SSD advantageously possesses quick data transfer rate, small volume, and light weight and has thus become a mainstream consumer electronic product when it comes to the storage of a large volume of data.
As indicated in FIG. 1, a flowchart for writing data to an SSD according to the prior art is shown. According to the prior art, the write data request received by the SSD mainly has two sources: one comes from the host, the other comes from the internal of the SSD. Firstly, a write data request is received from the host (step P1). Then, the write data is buffered to a dynamic random access memory (DRAM) of the SSD (step P2). Then, the buffered write data is encoded by an ECC encoder, and the encoded data is further added to the buffered write data (step P3), such that when the write data having been stored is read again, the data with erroneous signal is automatically corrected through the ECC encoded data to assure that the write data is read correctly. Then, the write data encoded by the ECC encoder is written to the flash memory of the SSD (step P4).
Secondly, the write data request comes from the internal of the SSD (step P5). Since each memory cell in the flash memory of the SSD is subjected to use frequency limitation, the memory cell will fail when the erase/write frequency exceeds the predetermined limitation. To prolong the lifespan, the SSD needs to execute wear leveling to move the written data to a memory block with lower erase/write frequency to reduce the average erase/write frequency. Also, the flash memory comprises several physical blocks. Each physical block contains a plurality of pages and is used as a data storage unit. When erasing data, the data is erased in the unit of physical block. Therefore, the deserted pages of the flash memory after updates cannot be immediately erased. Instead, the deserted pages are registered in the flash transmit layer (FTL) using the correspondence between logical address and physical address. Then, the SSD automatically executes a procedure for collecting rubbish blocks to move the few pages, which remain valid in the physical blocks, to other physical blocks first and then erase the data stored in the deserted physical blocks so that the physical blocks can be recycled.
When the SSD executes wear leveling or rubbish block collecting procedure process during the processing of a write data request, firstly, the data that will be moved to each flash memory needs (step P6) is read by the SSD. Then, the read data is further decoded as an original write data by the ECC encoder (step P7), and buffered to the DRAM of the SSD (step P2). After the destination position of the data is re-arranged, the buffered data is encoded by the ECC encoder and then added to the ECC encoded data (step P3). Lastly, the encoded data is written to the flash memory in the SSD (step P4).
According to the prior art, the DRAM normally has to at one hand receive the write data from the host and at the other hand receive the data read for the internal movement of the SSD and at the same time has to process the write data request for the flash memory. Consequently, the data cannot be accessed timely, and SSD data writing is delayed. Besides, during the write data process, the SSD not only buffers the host write data to the DRAM but also buffers the read internal write data to the DRAM. It is very likely that the DRAM is used to the limit and ends up with insufficient capacity, which will eventually affect the overall access efficiency of the SSD. Therefore, the SSD still has many problems to resolve when it comes to the method for writing data.